Discussion:
Design your Own Chip
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mhx
2024-07-14 14:32:23 UTC
Permalink
One of the things I expect to happen in the next
decade is that people have their own chips and SOCs
*manufactured* like they currently order their
breadboards.

The problem is not of design -- that has been possible
for a long time already. It is the scale: manufacturing
a few ICs for a single project is simply too expensive.

It appears that we won't have to wait another 10 years:
https://tinytapeout.com/ has found a way to pack multiple
designs on a single die. Your own chip might be in the
mail for less than 100$ (if you have 4 friends).

Very probably this development will trigger interest
for very small, powerful, and memory efficient languages
(assuming these projects will use yesterday's chip
processes, not a 2nm fab).

-marcel
Anton Ertl
2024-07-14 15:29:01 UTC
Permalink
Post by mhx
One of the things I expect to happen in the next
decade is that people have their own chips and SOCs
*manufactured* like they currently order their
breadboards.
To some extent this has happened since the 1980s
<https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_design_revolution>

I don't expect the extent to increase. The reason is that the cost of
mask sets has increased to millions of dollars as processes have advanced.

So while MOSIS <https://en.wikipedia.org/wiki/MOSIS> and now TINY
TAPEOUT offer relatively cheap chip manufacturing for low numbers of
chips, MOSIS is funded by DARPA. And I expect that there is also some
subsidy involved by the foundries, in the hope that some of the
projects will take off and get into high-volume production where they
pay real money for both the masks and the wafer processing.
Post by mhx
The problem is not of design -- that has been possible
for a long time already.
I did not see much about TINY TAPEOUT withou JavaScript (which I did
not use), but from what I saw, their story is that they make the
designing easier and cheaper (and offer manufacturing for
one-stop-shopping).
Post by mhx
Very probably this development will trigger interest
for very small, powerful, and memory efficient languages
(assuming these projects will use yesterday's chip
processes, not a 2nm fab).
A few years ago I looked at what MOSIS offers. It had a number of
yesteryear processes, but also offered access to an almost-current
TSMC and IIRC Globalfoundry process.

I don't see what process TINY TAPEOUT offers. The 160 x 100 um tile
may be a bit disappointing if it's a 0.35um process.

- anton
--
M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
New standard: https://forth-standard.org/
EuroForth 2024: https://euro.theforth.net
mhx
2024-07-14 17:04:52 UTC
Permalink
Post by Anton Ertl
Post by mhx
One of the things I expect to happen in the next
decade is that people have their own chips and SOCs
*manufactured* like they currently order their
breadboards.
[.. informative comments deleted ..]
Post by Anton Ertl
I don't see what process TINY TAPEOUT offers. The 160 x 100 um tile
may be a bit disappointing if it's a 0.35um process.
They advise to start with an FPGA project, but I see talk
about RISC V and the Skywater 130nm process (Pentium IV?).
An FPGA process is certainly better than 350nm, and I guess
(I'm not an expert) no custom masks are needed.

-marcel
a***@spenarnc.xs4all.nl
2024-07-15 10:26:10 UTC
Permalink
Post by mhx
One of the things I expect to happen in the next
decade is that people have their own chips and SOCs
*manufactured* like they currently order their
breadboards.
The problem is not of design -- that has been possible
for a long time already. It is the scale: manufacturing
a few ICs for a single project is simply too expensive.
https://tinytapeout.com/ has found a way to pack multiple
designs on a single die. Your own chip might be in the
mail for less than 100$ (if you have 4 friends).
Very probably this development will trigger interest
for very small, powerful, and memory efficient languages
(assuming these projects will use yesterday's chip
processes, not a 2nm fab).
Remember the F.I.E.T.S. project, with Kees Moerman and the
late Arie Kattenberg? The instruction set was mostly my doing,
and Kees Moerman had the instruction set implemented on
my Osborne (CP/M) and the emulator ran a Forth?
We didn't go further, because Chuck Moore was first with
his NOVIX chip.
This could become interesting.
Forth
Implementation by
Enhanced
T...
System
(The fashion was to contrive cute acronyms)
Post by mhx
-marcel
--
Don't praise the day before the evening. One swallow doesn't make spring.
You must not say "hey" before you have crossed the bridge. Don't sell the
hide of the bear until you shot it. Better one bird in the hand than ten in
the air. First gain is a cat purring. - the Wise from Antrim -
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